Week of October 5: LVDS tuning, test points, and silkscreen
Two days of PCB work, checking LVDS length tuning and filtering the power input, then sorting out test points, passing a preliminary design review, and cleaning up silkscreen.
Two posts this week, both still on the same board. The first was finishing off signal and power details, the second was getting it ready for review.
- LVDS length tuning and a pi filter on the power input: rechecked the LVDS pairs over the accordion tuning sections, and the accordion barely moves the impedance, so those sections are on target. Then brought power onto the board through a pi filter that keeps switching noise out in both directions, from the supply and from the FPGA board back onto the line.
- Test points, a preliminary review, and silkscreen cleanup: test points that have to work with the board inside its metal box and outside it, so U.FL connectors, used sparingly since they aren’t rated for continuous use. Every one of my sections got validated at the preliminary design review. The rest of the day was silkscreen: names showing, designators placed, arrows drawn, and vias tented so silkscreen can go over them.
Final review is Monday, so that’s next.